1. Technical Field of the Invention
This invention relates to a distributed FET amplifier and a bias voltage supply circuit therefor, and more specifically, to a distributed FET amplifier used in a micro-wave range for communication, radar and the like, and a bias voltage supply circuit for preventing the distributed FET amplifier from being affected by a voltage source.
2. Description of the Prior Art
FIG. 1 shows an equivalent circuit of the distributed FET amplifier described in "A monolithic GaAs 1-13 GHz traveling-wave amplifier" (edited by Y. Ayasle, et al, IEEE Trans. vol. MTT-30, pp. 976-981, July 1982). In this circuit, four FET (field effect transistor) elements are used. In this figure, reference numerals 1, 2, and 3 designate an input terminal, an output terminal, and the FET elements, respectively. Also, reference numerals 4, 5 and 6 designate respectively the gate terminal, the drain terminal, and the source terminal of said FET elements 3. Inductor elements 7, 8 and terminating devices 9, 10 are also used in this amplifier.
In operation, a microwave power applied to input terminal 1 sequentially propagates through inductor elements 7 toward terminating devices 9. During propagation, the microwave is partially supplied to gate electrodes 4 of FET elements 3 by means of which it is amplified. The microwave power thus amplified sequentially propagates through inductor elements 8 to output terminal 2. Terminating devices 9 and 10 are adapted not only to absorb unnecessary microwave power but also to improve reflection characteristics at input terminal 1 and output terminal 2 so that the gain of the circuit can be kept flat over a wide frequency band.
A typical equivalent circuit of a conventional FET element is shown in FIG. 2. In this figure, reference symbols Cgs, Rg, gm, Cds, and Rds represent the gate-source capacitance of capacitor 11 constituted between the gate and the source electrodes, gate resistance, mutual conductance, drain-source capacitance, and drain-source resistance, respectively. In operation, when microwave power is applied to gate terminal 4, a microwave voltage v is developed across capacitor 11 between the gate and source electrodes. This voltage is amplified by the mutual conductance gm to produce a current source v gm. Since the gate-drain capacitance Cgd is normally very small and can be to all intents and purposes ignored, the equivalent circuit of FIG. 1 can be regarded as consisting of a gate side equivalent circuit as shown in FIG. 3(a) and a drain side equivalent circuit as shown in FIG. 3(b). It should be noted that both FIG. 3(a) and FIG. 3(b) show a circuit equivalent to a distributed constant line having loss.
The characteristic impedance Zo of said distributed constant line is constant regardless of frequency. Therefore, if proper inductor elements 7 and 8 having reactances corresponding to the internal capacitances Cgs and Cds of FETs 3 and terminating devices 9 and 10 are used, it is possible to obtain an amplifier which allows a small reflection over a wide frequency band.
However, as shown in FIG. 3(a), the gate side equivalent circuit is equivalent to a distributed constant circuit having a loss due to resistance Rg. Furthermore, since microwave voltages v1, v2, v3 and v4 developed across capacitors 11 between gate and source normally have the following relationship: EQU v1&gt;v2&gt;v3&gt;v4 (1)
FET elements 3 are not excited uniformly. This tendency becomes more significant as the frequency becomes higher. This means that as the frequency gets higher, the amplification of the microwave power input becomes less efficient. Thus, the prior art distributed FET amplifier is disadvantageous in that its gain is lowered in a high frequency range.
FIG. 4 is an equivalent circuit of another example of the prior art distributed FET amplifier, which combines by a normal T-branch outputs from two travelling-wave FET amplifiers, as described in "MESFET Distributed Amplifier Design Guidelines" (J. B. Beyer, et al, JEEE Trans., vol. MTT-32, No. 3, pp. 268-275, Mar. 1984). In the figure, reference numerals 1 and 2 designate an input terminal and an output terminal respectively; 3a and 3b designate FETs; 4a, 5a and 6a designate a gate terminal, drain terminal, and source terminal of FET 3a, respectively; 4b, 5b and 6b designate a gate terminal, drain terminal, and source terminal of FET 3a respectively; 7a, 7b, 8a and 8b designate inductors: 9a, 9b, 10a and 10b designate terminating devices; and 12 and 13 designate T-branches.
In operation, the microwave power applied to input terminal 1 is divided in half by T-branch 12. One of the two halves of the microwave power propagates through inductors 7a toward terminating device 9a. During propagation, the microwave power is partially supplied to each of FETs 3a by which it is amplified. The microwave power thus amplified propagates through inductors 8a to T-branch 13. The other half of the microwave power divided by T-branch 12 propagates through inductors 7b toward terminating device 9b. During propagation, the microwave power is partially supplied to each of FETs 3b by which it is amplified. The microwave power thus amplified propagates through inductors 8b to T-branch 13. The two microwave power components are combined at T-branch 13. The microwave power thus combined is passed to output terminal 2.
The operation of such a distributed FET amplifier of the power combining type will be further described hereinafter.
For the sake of brevity, it is assumed that all FETs 3a and 3b have the same configuration, that the inductance value of inductors 7a and 7b is constant and of a value Lg/2, the inductance value of inductors 8a and 8b being constant and of a value Ld/2, and that terminating devices 9a and 9b and terminating devices 10a and 10b have the same properties, respectively.
As already described with reference to FIG. 2, the microwave power applied to a gate terminal is amplified by the mutual conductance gm in the FET, and is produced at the drain terminal. Thus, amplification is effected. The gate-drain capacitance Cds (FIG. 2) is normally very small and to all intents and purposes can be ignored. Thus, the equivalent circuit of FIG. 4 can be represented by a gate side equivalent circuit as shown in FIG. 5(a) and a drain side equivalent circuit as shown in FIG. 5(b). Both the gate side and drain side equivalent circuits are equivalent to a circuit which includes two distributed constant lines having loss and T-branches connecting these distributed constant lines. In general, the characteristic impedance of a distributed constant circuit doesn't change with a change in frequency. Therefore, if suitable inductors 7a, 7b, 8a and 8b and terminating devices 9a, 9b, 10a and 10b which match FETs 3a and 3b are used, an amplifier having excellent VSWR characteristics and flat gain characteristics over a wide frequency band can be obtained.
However, the above mentioned operation is only possible when FETs 3a and 3b have exactly the same characteristics and the two microwaves which have reached T-branch 13 have the same amplitude and are in phase with each other. In general, FETs 3a and 3b have slightly different characteristics due to some dispersion. As a result, the two microwaves which have reached T-branch 13 have different amplitudes and phases. If there is such an imbalance between the power of the two microwaves, the power amounting to the difference between the two microwaves is reflected by T-branch 13. The reflected microwave returns toward the FETs, having adverse effects thereon. As a result, the gain or output of the FETs may be lowered or oscillation may occur.
A way of giving a suitable bias voltage to the FETs shown in FIGS. 1 and 4 is to insert a parallel circuit of a resistor and a capacitor between the source terminal of each FET and the ground. FIG. 6 shows an example of such a bias circuit for operating the FETs of FIG. 1 by a single power source.
The reference numerals 14 and 15 designate a resistor and a capacitor, respectively. This bias circuit includes a parallel circuit composed of resistor 14 and capacitor 15 which are connected between source terminal 6 of FET 3 and the ground. In this arrangement, a voltage applied to drain terminal 5 causes current to flow from drain terminal 5 to source terminal 6, which develops a potential difference across resistor 14. This potential difference allows a desired voltage to be applied to gate terminal 4. Capacitor 15 is used to ground source terminal 6 with respect to microwave power. Gate terminal 4 is grounded with respect to the direct current by a suitable means (not shown in FIG. 6).
FIG. 7 shows an actual configuration of the circuit of FIG. 6, as shown in Japanese Patent Public Disclosure No. 68055/82. The reference numerals 16 and 17 designate a carrier and a metal wire, respectively. A parallel plate capacitor 15 is connected to one end of chip-type FET 3. Chip-type resistor 14 and chip-type capacitor 15 are arranged at the other end of FET 3. FET 3, resistor 14, and capacitor 15 are mounted in a nearly straight line on carrier 16. One of the source terminals of FET 3 is connected through metal wire 17 to capacitor 15 and the other one of the source terminals is connected to capacitor 15, resistor 14 and carrier 16 by metal wire 17. Carrier 16 is made of metal and is grounded with respect to the direct current and the microwave current. It should be noted that in the circuit of FIG. 6, one capacitor 15 is connected to source terminal 6, whereas, in FIG. 7, two capacitors each having a capacitance half that of capacitor 15 are used instead of one capacitor 15.
By applying such a bias circuit of FIG. 6 to a known distributed FET amplifier, a distributed amplifying circuit fed by a single power source can be obtained. Such an amplifying circuit comprising a plurality of FETs is shown in FIG. 8. In this figure, the reference numerals 18, 19 and 20 designate distributed constant lines; and 21 designates a terminating resistor. This amplifier includes three FETs 3. Distributed constant lines 18 connect gate terminals 4 of FETs 3, and distributed constant lines 19, 20 connect drain terminals 5 of FETs 3. Resistor 14 and capacitor 15 are connected to source terminal 6 of each FET 3 so that each FET can be operated by a single power source. In FIG. 8 direct current blocking capacitors are omitted.
FIG. 9 shows an example of an actual configuration of the distributed amplifier shown in FIG. 8, FETs 3 being arranged in a nearly straight line. For the sake of brevity, only the circuit construction in the vicinity of two adjacent FETs 3 is shown in the figure. The circuit construction in the vicinity of the remaining FET 3 is similar to this. While chip-type FET 3, chip-type resistor 14 and chip-type capacitor 15 are used in FIG. 7, a monolithic integrated circuit configuration is employed in FIG. 9 because it is difficult to embody such a distributed amplifier by using such chip-type components.
In FIG. 9, metal islands 22 are interposed between two adjacent FETs 3. Each metal island 22 has via-hole 23 provided in an approximately central portion thereof through which metal island 22 is grounded. Capacitors 15 are respectively disposed on metal islands 22. One of source terminals 6 of FET 3 is grounded via capacitor 15, metal island 22, and via-hole 23 with respect to the microwave current. The other one of source terminals 6 is grounded via resistor 14 with respect to the direct current. An air bridge or the like is used for connecting source terminal 6 with capacitor 15 and capacitor 15 with resistor 14. Capacitors 15 are in the form of a parallel plate capacitor. Resistors 14 are made of an epitaxial resistor or the like. FETs 3, resistors 14, capacitors 15, metal islands 22 and distributed constant circuits 18, 19 are integrally formed on a single semiconductor substrate as a monolithic integrated circuit.
In such a distributed amplifier employing a bias circuit as shown in FIG. 6, a number of FETs 3, capacitors 15 and resistors 14 are arranged on the semiconductor substrate in a nearly straight line. As a result, the distributed amplifier requires a greater width. Such a construction makes the semiconductor substrate susceptible to cracking. Such a construction is also disadvantageous in that the distance between FETs 3 is greater than the predetermined length of distributed constant circuits 18, thus making it impossible to embody a desired distributed amplifier.
In order to supply a bias voltage to such distributed FET amplifiers as shown in FIGS. 1, 4 and 8, a bias voltage supply circuit such as that shown in FIG. 10 may be employed, as disclosed by Japanese Patent Public Disclosure No. 233912/85. In FIG. 10, the reference numerals 24, 25 are distributed constant lines; 26 designates a resistor; 27, 28 and 29 are capacitors; and 30 and 31 are a voltage supply terminal and an output terminal, respectively.
In this bias voltage supply circuit, two distributed constant lines 24, 25 are disposed between voltage supply terminal 30 and output terminal 31. Distributed constant line 24 is grounded at its right-hand end (as viewed in the figure) via a series connection circuit consisting of resistor 26 and capacitor 27, and at its left-hand end via capacitor 28. Distributed constant line 25 is grounded at its left-hand end via capacitor 29. In such an arrangement, a low-pass filter consisting of distributed constant lines 24, 25, and capacitors 28, 29 can be regarded as being grounded at its right-hand end via a series connection circuit consisting of resistor 26 and capacitor 27. The voltage supply terminal is connected to a voltage source VS and output terminal 31 is connected to a wideband amplifier such as a distributed FET amplifier (not shown).
Distributed constant lines 24, 25 and a capacitors 28, 29, which constitute the low-pass filter, have parameters chosen such that the cut-off frequency of the low-pass filter is lower than a desired frequency band. Capacitor 27 has a capacitance chosen such that it produces an impedance small enough in the desired frequency band. As a result, the impedance viewed from the point A (FIG. 10) is substantially infinite in a desired frequency band. The impedance viewed from output terminal 31 to voltage supply terminal 30 is substantially equal to the resistance of resistor 26.
Accordingly, output terminal 31 is terminated by resistor 26 in the desired frequency band, making it possible to stabilize the operation of the wideband amplifier connected thereto. Furthermore, when a desired D.C. voltage is applied to voltage supply terminal 30 from voltage source VS, a bias voltage can be supplied to the wideband amplifier from output terminal 31 via distributed constant lines 24, 25 without any voltage drop.
However, such a bias voltage supply circuit, having the above mentioned construction, is disadvantageous in that the impedance viewed from the point A depends much on the impedance of voltage source VS connected to voltage supply terminal 30 unless the low-pass filter has many stages sufficient to make the impedance viewed from the point A infinite. Since the impedance viewed from output terminal 31 to voltage supply terminal 30 depends on the impedance of voltage source VS, the characteristics of the amplifier depend on the voltage source used. Sometimes the bias voltage supply circuit makes the operation of the wideband amplifier unstable.